The eProcessor 4-year project (1/4/21 – 31/3/25) aims to build a new open Out=of-Order(OoO0 processor and deliver the first completely open European full-stack ecosystem based on this new RISC-V CPU.

eProcessor technology will be extendable (open), energy efficient (low power), extreme-scale (high performance), suitable for uses in HPC and embedded applications, and extensible (easy to add on-chip and/or off-chip components). 

The project is an ambitious combination of processor design, based on the RISC-V open hardware ISA, applications and system software, bringing together multiple partners to leverage and extend pre-existing Intellectual Property (IP), combined with new IP that can be used as building blocks for future HPC systems, both for traditional and emerging application domains.


The eProcessor project’s overall goal is to create an open full stack ecosystem (both software and hardware) by achieving the following objectives:

  • Software/hardware co-design for improved application performance and system energy efficiency.
  • HPC and HPDA applications.
  • Focus on sustained application performance.
  • Stimulate European collaboration.
  • Combining industry standard methodology and cutting-edge research to accelerate exploitation.
  • Europe’s first Open high performance Out-of-Order (OOO) 64-bit RISC-V platform:
    • 4-way OOO Core
    • Single core & multi-core: 2 different chips
    • Multi-socket, cache coherent implementation
    • Adaptive caches
    • On chip Vector + AI accelerator
    • New Bioinformatics accelerator co-processor
    • Coherent off-chip accelerator: CNN


  • HPC:
  • Bioinformatics: FM-index, Smith-Waterman, Smith-Waterman-Gotoh, WFA.
  • AI applied to Bioinformatics: DeepHealth toolkit (EDDL+ECVL).
  • AI: Smart Mirror, Border Surveillance.