€8m project for Europe’s first RISC-V supercomputer chip

A European project is developing a high performance RISC-V processor for supercomputer designs and derivatives for automotive and edge IoT.

The €8m eProcessor project is using a high-performance Out-of-Order (OoO) processor core based on the RISC-V instruction set architecture as the first high performance computing ecosystem.

The three year project is led by the Barcelona Supercomputing Centre and is supported by Euro HPC funding with a core developed by French designer Cortus and participation from Thales in France and Exapsys in Greece.

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