eProcessor

European, extendable, energy-efficient, extreme-scale, extensible, Processor Ecosystem

Our motivation

The eProcessor project aims to build a new open OoO processor and accelerators and deliver a completely open European full-stack ecosystem

eProcessor technology will be extendable, energy efficient, extreme-scale, suitable for uses in HPC and embedded applications, and extensible.

Our Unique Value Proposition

eProcessor offers an open complete hardware-software stack for HPC systems utilizing cutting-edge mainly open-source technologies based on the RISC-V architecture providing a hardware device (eProcessor TC1 chip), a HW emulation system (the multi-core FPGA SDV), an advanced simulation system (on top of GEM5) and the corresponding low-level SW which all allow for the efficient development of advanced HPC applications and systems.

Our approach

Software/hardware co-design for improved application performance and energy efficiency
HPC
HPDA (AI/ML/DL)
Bioinformatics
High performance Out-of-Order (OOO) 64-bit RISC-V platform
4-way OOO Core
Single core & multi-core designs
Multi-socket, cache coherent implementation
Adaptive caches, HW/SW fault tolerance
On chip Vector + AI + Bioinformatics accelerator co-processor, reduced & mixed-precision
Cache-coherent off-chip CNN accelerator